Definition and control of contact holes in a CMP process

Christine Wallace; Brian Martin; Graham G. Arthur

doi:10.1117/12.308772

8 June 1998 Definition and control of contact holes in a CMP process

Christine Wallace, Brian Martin, Graham G. Arthur

Proceedings Volume 3332, Metrology, Inspection, and Process Control for Microlithography XII; (1998) https://doi.org/10.1117/12.308772
Event: 23rd Annual International Symposium on Microlithography, 1998, Santa Clara, CA, United States

Abstract

Control of contact hole sizes in a sub-half-micron CMOS process using planarisation by resist etch back and chemical mechanical polishing is discussed. The limitations of using top anti-reflective coatings to overcome thin film effects on transparent substrates are calculated by simulation. Use of bottom anti-reflective coatings to improve uniformity in the resist etch back process are described through practical results which additionally show that comparable results are achieved in the chemical mechanical polishing process but in the absence of a bottom anti-reflective coating.

Citation Download Citation

Christine Wallace, Brian Martin, and Graham G. Arthur "Definition and control of contact holes in a CMP process", Proc. SPIE 3332, Metrology, Inspection, and Process Control for Microlithography XII, (8 June 1998); https://doi.org/10.1117/12.308772

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