Paper
12 September 1996 Source drain leakage: a potential problem in submicron CMOS devices
Yeoh Eng Hong, Ali Keshavarzi, Martin Tay
Author Affiliations +
Abstract
As transistor dimension shrinks down below submicron to cater for higher speed and higher packing density, it is very important to ensure that the shrinkage is done painstakingly to avoid unwanted leakage problems. This paper reports the discovery of two new failure mechanisms, short poly end-cap and silicon dislocation, that are found to cause subtle source drain leakage in sub-micron CMOS product. The electrical characteristics of the failure and the special techniques that are employed to fault isolate the problem are also discussed in this paper.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yeoh Eng Hong, Ali Keshavarzi, and Martin Tay "Source drain leakage: a potential problem in submicron CMOS devices", Proc. SPIE 2874, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II, (12 September 1996); https://doi.org/10.1117/12.250831
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CITATIONS
Cited by 1 scholarly publication.
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KEYWORDS
Transistors

Silicon

Voltage controlled current source

Failure analysis

Etching

Resistors

CMOS devices

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