Neural network architecture for fault diagnosis of digital circuits

Susamma Barua

doi:10.1117/12.216360

11 August 1995 Neural network architecture for fault diagnosis of digital circuits

Susamma Barua

Proceedings Volume 2568, Neural, Morphological, and Stochastic Methods in Image and Signal Processing; (1995) https://doi.org/10.1117/12.216360
Event: SPIE's 1995 International Symposium on Optical Science, Engineering, and Instrumentation, 1995, San Diego, CA, United States

Abstract

A neural network architecture that is capable of assisting as well as providing valuable information in diagnosing faults in digital circuits is presented here. Once a digital circuit has been constructed, it is required to test the circuit in order to find out how well the digital circuit works. The neural network architecture presented here will be useful on a wide variety of circuits, both analog and digital, and efficient for guiding the search and forming fault and test hypotheses in diagnostic trouble-shooting of electronic circuits.

Citation Download Citation

Susamma Barua "Neural network architecture for fault diagnosis of digital circuits", Proc. SPIE 2568, Neural, Morphological, and Stochastic Methods in Image and Signal Processing, (11 August 1995); https://doi.org/10.1117/12.216360

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available