Paper
26 May 1995 Investigation of lithography yield-loss issues from focusing/leveling system of advance stepper
Daniel Hao-Tien Lee, Chia-Jen Cheng, Tah-Te Shih
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Abstract
Three types of dies on the wafer including dies on wafer edge, dies adjacent to testkey patterns, and dies with asymmetric chip layout have been identified for mistilting on the lithography exposure processes. There are several approaches i.e. dummy die exposed on the wafer edge, various focus offset, and pattern layout modification etc. can alleviate this problem. However, to complete solve these issues rely on the fundamental and methodical improvements on the stepper leveling system and control software.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Daniel Hao-Tien Lee, Chia-Jen Cheng, and Tah-Te Shih "Investigation of lithography yield-loss issues from focusing/leveling system of advance stepper", Proc. SPIE 2440, Optical/Laser Microlithography VIII, (26 May 1995); https://doi.org/10.1117/12.209311
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Cited by 1 scholarly publication.
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KEYWORDS
Aluminum

Semiconducting wafers

Lithography

Inspection

Control systems

Image processing

Metals

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