Paper
9 September 1994 Analysis and design considerations for manufacturable and reliable 0.18-micron N-MOSFETs
Shyam Krishnamurthy, S. Jallepalli, ChohFei Yeap, Khaled Hasnat, Christine M. Maziar, Al F. Tasch Jr.
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Abstract
As MOSFET dimensions are scaled, innovative techniques are required to overcome many problems specific to short-channel devices, while retaining the performance enhancement that justifies scaling to smaller dimensions. We present a design methodology and an analysis investigating the design approaches and the trade-offs for simultaneously obtaining high performance, reliable, and manufacturable 0.18 micron n-channel MOSFETs. The results of two-dimensional numerical device simulations of three candidate structural approaches that have been selected based on scalability, reliability, manufacturability, and performance considerations are discussed. The influence of effects such as velocity overshoot and inversion layer quantization on the device behavior and the trends and trade-offs are described.
© (1994) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Shyam Krishnamurthy, S. Jallepalli, ChohFei Yeap, Khaled Hasnat, Christine M. Maziar, and Al F. Tasch Jr. "Analysis and design considerations for manufacturable and reliable 0.18-micron N-MOSFETs", Proc. SPIE 2335, Microelectronics Technology and Process Integration, (9 September 1994); https://doi.org/10.1117/12.186059
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Cited by 1 scholarly publication.
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KEYWORDS
Doping

Power supplies

Manufacturing

Reliability

Monte Carlo methods

Quantization

Oxides

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