Triple-level metal process for high-performance and high-density 0.6-um/5-V application-specific integrated circuits

Sharad Prasad; M. Bruner; Fusen E. Chen; Mitan Gandhi; Y. C. Lu; Chiyi Y. Kao; Steve Yang; William Hata

doi:10.1117/12.156512

15 September 1993 Triple-level metal process for high-performance and high-density 0.6-μm/5-V application-specific integrated circuits

Sharad Prasad, M. Bruner, Fusen E. Chen, Mitan Gandhi, Y. C. Lu, Chiyi Y. Kao, Steve Yang, William Hata

Author Affiliations +

Proceedings Volume 2090, Multilevel Interconnection: Issues That Impact Competitiveness; (1993) https://doi.org/10.1117/12.156512
Event: Microelectronic Processing '93, 1993, Monterey, CA, United States

Abstract

In this paper a triple level metal interconnect process for a commercially available high density, high performance 0.6 micrometers /5V CMOS technology is described. Poly gates of 0.6 micrometers (L_eff equals 0.45 micrometers ) were fabricated and then planarized by BPSG reflow and resist etch back. Blanket W and etch back were used to fill high aspect ratio contacts and vias with TiN as the nucleation barrier. Low temperature RTA was performed after Ti/TiN deposition, and rf etch was performed for contacts and vias respectively, prior to Ti/TiN depositing, to achieve reliable contacts and via resistance. Stable contacts/via resistance down to 0.7 micrometers with good junction integrity/stackability and negative metal enclosure have been demonstrated and been physically characterized by HTEM. TiN/Al-Cu/TiN was used for M1/M2/M3 interconnection and TEOS/resist etch back/TEOS refill was used for ILD1 and ILD2. A TEOS/nitride sandwich was used for final passivation. A satisfactory yield has been achieved on 2.9 cm² die size with 0.6 million usable gates.

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Sharad Prasad, M. Bruner, Fusen E. Chen, Mitan Gandhi, Y. C. Lu, Chiyi Y. Kao, Steve Yang, and William Hata "Triple-level metal process for high-performance and high-density 0.6-μm/5-V application-specific integrated circuits", Proc. SPIE 2090, Multilevel Interconnection: Issues That Impact Competitiveness, (15 September 1993); https://doi.org/10.1117/12.156512

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