Paper
11 October 1993 High-speed CCD image processing at 75 MSPS and 10-bit range
Bojan T. Turko, George J. Yates, Kevin L. Albright, Nicholas S. P. King
Author Affiliations +
Abstract
High frame rate CCD video cameras require high clock frequencies for running photocharge transport registers, especially when the sensor has only a single video port. It was found that some sensors of the interline transfer architecture allow for horizontal charge transport clock rates in excess of 75 MHz while still producing images of acceptable quality. We describe a relatively inexpensive method for analog-to-digital processing of video images at rates of 75 MSPS and 10-bit range. Images are stored in a fast, 512 X 512 X 12 kbit random access memory (RAM). Upon the data transfer into a processor, the public domain `NIH IMAGE' software is used for image analysis.
© (1993) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Bojan T. Turko, George J. Yates, Kevin L. Albright, and Nicholas S. P. King "High-speed CCD image processing at 75 MSPS and 10-bit range", Proc. SPIE 2002, Ultrahigh- and High-Speed Photography, Videography, and Photonics '93, (11 October 1993); https://doi.org/10.1117/12.161363
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CITATIONS
Cited by 3 scholarly publications.
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KEYWORDS
Video

Image processing

Sensors

Clocks

Amplifiers

CCD image sensors

Cameras

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