Modeling of neural net chips using image algebra

Trevor E. Meyer; Paul M. Freeman; Jennifer L. Davidson

doi:10.1117/12.23598

1 November 1990 Modeling of neural net chips using image algebra

Trevor E. Meyer, Paul M. Freeman, Jennifer L. Davidson

Proceedings Volume 1350, Image Algebra and Morphological Image Processing; (1990) https://doi.org/10.1117/12.23598
Event: 34th Annual International Technical Symposium on Optical and Optoelectronic Applied Science and Engineering, 1990, San Diego, CA, United States

Abstract

Commercial hardware for neural network implementations is becoming more readily available. However as yet there exists no hardware- or software-independant environments in which to compare neural net chips. This paper presents a comparison of the Hamming net modeled on two neural net chips using image algebra a mathematical structure developed for use in image processing and related fields. The two chips used in the comparison are the Electrically Trainable Analog Neural Network (ETANN) from Intel and the Neural Bit Slice (NBS) from Micro Devices and are on opposite ends of the spectrum of available neural network hardware. The ETANN is almost entirely analog while the NBS is an all-digital device. The image algebra pseudocode modeled well not only the internals of the chips but the external logic and control as well.

Citation Download Citation

Trevor E. Meyer, Paul M. Freeman, and Jennifer L. Davidson "Modeling of neural net chips using image algebra", Proc. SPIE 1350, Image Algebra and Morphological Image Processing, (1 November 1990); https://doi.org/10.1117/12.23598

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