Design of a dual synchronous buck controller

Lan Dai; Jiajing Zhang

doi:10.1117/12.3033066

5 July 2024 Design of a dual synchronous buck controller

Lan Dai, Jiajing Zhang

Proceedings Volume 13184, Third International Conference on Electronic Information Engineering and Data Processing (EIEDP 2024); 1318405 (2024) https://doi.org/10.1117/12.3033066
Event: 3rd International Conference on Electronic Information Engineering and Data Processing (EIEDP 2024), 2024, Kuala Lumpur, Malaysia

Abstract

Based on the xfab-0.18um HV SOI process, a self-adaptive BUCK-type dual-channel synchronous DC-DC controller was designed, using the D-CAP ( Directly from the output capacitors) mode with adaptive conduction time for loop control. The D-CAP mode has high efficiency, fast response, and simple The D-CAP mode has high efficiency, fast response, and simple loop control, simplifying the circuit while improving the stability and reliability of the system circuit. synchronous buck controller includes three operating modes: PWM mode, Auto skip mode, and PSM mode, which can address applications with light loads and heavy loads. The final designed dual-channel synchronous buck controller includes three operating modes: PWM mode, Auto skip mode, and PSM mode, which can address applications with light loads and heavy loads. The controller supports an input voltage range of 5.528V and an output voltage range of 25.5V. efficiency with an input voltage of 12V and an output voltage of 5V. Under the highest frequency application, the ripple is less than 50mV, and the load transient response time is less than 3%. Under the highest frequency application, the ripple is less than 50mV, and the load transient response time is less than 3us. Finally, the overall circuit was simulated and analyzed, and the results met the expected targets.

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Lan Dai and Jiajing Zhang "Design of a dual synchronous buck controller", Proc. SPIE 13184, Third International Conference on Electronic Information Engineering and Data Processing (EIEDP 2024), 1318405 (5 July 2024); https://doi.org/10.1117/12.3033066

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