Design of a hysteresis comparator with temperature compensation

Haojie Dai; Yunyang Gong; Yanling Li; Jiangping He; Yankun Xia

doi:10.1117/12.3030709

5 June 2024 Design of a hysteresis comparator with temperature compensation

Haojie Dai, Yunyang Gong, Yanling Li, Jiangping He, Yankun Xia

Proceedings Volume 13163, Fourth International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2024); 1316310 (2024) https://doi.org/10.1117/12.3030709
Event: International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2024), 2024, Xi'an, China

Abstract

Utilizing 0.18μm CMOS process, a hysteresis comparator with temperature compensation has been devised. A compensating current is generated through two NMOS transistors operating in the linear region, thereby mitigating the temperature-dependent coefficients in the hysteresis voltage expression to achieve heightened precision in hysteresis voltage. The model is constructed using Cadence software, and simulation results reveal that the compensated hysteresis comparator exhibits an exceedingly low temperature coefficient. Specifically, with an average hysteresis voltage of 81.67mV, and a temperature range spanning from -40°C to 170°C, the hysteresis voltage undergoes a variation of 15mV, resulting in a temperature coefficient of 0.0714mV/°C.

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Haojie Dai, Yunyang Gong, Yanling Li, Jiangping He, and Yankun Xia "Design of a hysteresis comparator with temperature compensation", Proc. SPIE 13163, Fourth International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2024), 1316310 (5 June 2024); https://doi.org/10.1117/12.3030709

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