Presentation + Paper
9 April 2024 Optimization of NIL and associated pattern transfer processes for the fabrication of advanced devices
Makoto Ogusu, Masahiro Tamura, Yu Nomura, Tomohiro Saito, Hideki Kunugi, Tomohito Yamaji, Fumiaki Tanaka, Takahiro Abe
Author Affiliations +
Abstract
Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. Any new lithographic technology to be introduced into manufacturing must deliver either a performance advantage or a cost advantage. Key technical attributes include alignment, overlay and throughput. In previous papers, overlay and throughput results have been reported on test wafers. In 2018, Hiura et al. reported a mix and match overlay (MMO) of 3.4nm and a single machine overlay (SMO) across the wafer was 2.5nm using an FPA-1200 NZ2C four station cluster tool. These results were achieved by combining a magnification actuator system with a High Order Distortion Correction (HODC) system, thereby enabling correction of high order distortion terms up to K30. Unlike other lithographic methods, NIL provides the pattern flexibility and a cost structure to address a much larger application space. Potential market expansion and includes high end semiconductor devices, CMOS image sensors, optical couplers for augmented reality headsets and meta optical elements (MOEs). The purpose of this paper is to describe the patterning and pattern transfer performance enhancements to enable improved edge placement error for DRAM applications, allow the patterning of dual damascene back end structures with a simpler single step imprint patterning process and to create working MOEs operational in the visible spectrum.
Conference Presentation
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Makoto Ogusu, Masahiro Tamura, Yu Nomura, Tomohiro Saito, Hideki Kunugi, Tomohito Yamaji, Fumiaki Tanaka, and Takahiro Abe "Optimization of NIL and associated pattern transfer processes for the fabrication of advanced devices", Proc. SPIE 12956, Novel Patterning Technologies 2024, 1295604 (9 April 2024); https://doi.org/10.1117/12.3012453
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KEYWORDS
Nanoimprint lithography

Optical lithography

Molybdenum

Etching

Line width roughness

Lithography

Overlay metrology

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