Using pattern analysis to improve process window qualification cycle time

Tsung-Wei Lin; Hung-Yu Lin; Meng-Shiun Chiang; Jung-Kuan Huang; Jason Sweis; Philippe Hurat; Chung-Chen Hsu; Chun-Sheng Wu; Chao-Yi Huang; Ya-Chieh Lai

doi:10.1117/12.3009892

10 April 2024 Using pattern analysis to improve process window qualification cycle time

Tsung-Wei Lin, Hung-Yu Lin, Meng-Shiun Chiang, Jung-Kuan Huang, Jason Sweis, Philippe Hurat, Chung-Chen Hsu, Chun-Sheng Wu, Chao-Yi Huang, Ya-Chieh Lai

Author Affiliations +

Proceedings Volume 12954, DTCO and Computational Patterning III; 129541B (2024) https://doi.org/10.1117/12.3009892
Event: SPIE Advanced Lithography + Patterning, 2024, San Jose, California, United States

Conference Poster

Abstract

Process Window Qualification (PWQ) is a well-known wafer inspection technique used to qualify the IC manufacturing lithography process window. Circuit designs are becoming denser and more complex in advanced semiconductor process technologies. Therefore, yield is becoming increasingly sensitive to defects. How to detect wafer defects at an early stage is the key to improving wafer yield. Additionally, shortening the PWQ total turn around run time is an important factor for a wafer yield improvement methodology. In this paper, the Winbond OPC team and Cadence Pegasus DFM team initiated a project to improve the PWQ run time and accuracy using a pattern analysis flow. This flow includes defect data pre-processing, classification, and filtering, including the use of CD-SEM image auto-alignment to improve extraction locations and wafer results. The huge data volumes are reduced in order to create easy to review results. This flow reduces the PWQ processing time and correctly finds real wafer defects to improve process windows and yield.

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

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Tsung-Wei Lin, Hung-Yu Lin, Meng-Shiun Chiang, Jung-Kuan Huang, Jason Sweis, Philippe Hurat, Chung-Chen Hsu, Chun-Sheng Wu, Chao-Yi Huang, and Ya-Chieh Lai "Using pattern analysis to improve process window qualification cycle time", Proc. SPIE 12954, DTCO and Computational Patterning III, 129541B (10 April 2024); https://doi.org/10.1117/12.3009892

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