Miniaturized real-time processor for image sequence analysis

William J. Jacobi; William B. Kendall; Leo A. Wadsworth

doi:10.1117/12.21228

1 September 1990 Miniaturized real-time processor for image sequence analysis

William J. Jacobi, William B. Kendall, Leo A. Wadsworth

Proceedings Volume 1295, Real-Time Image Processing II; (1990) https://doi.org/10.1117/12.21228
Event: 1990 Technical Symposium on Optics, Electro-Optics, and Sensors, 1990, Orlando, FL, United States

Abstract

Powerful new signal processing algorithms are now becoming available for such tasks as the detection and tracking of multiple targets via image sequence analysis. For typical real-time applications, these algorithms require throughputs on the order of hundreds to thousands of MFLOPS. In order to achieve such throughputs, it is necessary to employ parallel processing architectures, which normally require large size, weight and power consumption for their implementation. We have developed a high-performance, programmable MIMD processor called the SCC-lOO which is particularly well-suited for miniaturization using hybrid wafer-scale packaging technology. A 20-node configuration with a peak throughput in excess of 1 GFLOPS will be packaged in a three-inch cube using this approach.

Citation Download Citation

William J. Jacobi, William B. Kendall, and Leo A. Wadsworth "Miniaturized real-time processor for image sequence analysis", Proc. SPIE 1295, Real-Time Image Processing II, (1 September 1990); https://doi.org/10.1117/12.21228

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