Exploration of digital IC back-end low-power technology based on co-optimization

Che Han

doi:10.1117/12.3010619

2 November 2023 Exploration of digital IC back-end low-power technology based on co-optimization

Che Han

Proceedings Volume 12919, International Conference on Electronic Materials and Information Engineering (EMIE 2023); 129190A (2023) https://doi.org/10.1117/12.3010619
Event: 3rd International Conference on Electronic Materials and Information Engineering (EMIE 2023), 2023, Guangzhou,, China

Abstract

With the continuous development of integrated circuit manufacturing technology, the number of transistors on the chip and the increase in operating frequency has led to a gradual increase in power consumption per unit area. The huge power consumption generated by high-speed operation has become one of the important issues to be solved in current chip design, and the design difficulty of low-power chips is gradually increasing. This paper summarizes the current research results in the field of chip power optimization, which is divided into three main directions, namely chip static power optimization, chip dynamic power optimization and cooperative optimization. The dynamic power optimization direction adopts the DPRDP algorithm with signal line weighting; the static power optimization direction includes the dual-threshold voltage allocation algorithm; and the co-optimization direction adopts the multi-bit register clustering and merging algorithm. So far, there have been various methods to efficiently optimize chip energy consumption, but with the shrinking chip size and increasing functional requirements, the circuit power consumption must be addressed at the source. To this end, new materials need to be explored to effectively control leakage currents, I-R drop, etc. in circuits, and to investigate power consumption optimization schemes for large-scale integrated circuits.

(2023) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Che Han "Exploration of digital IC back-end low-power technology based on co-optimization", Proc. SPIE 12919, International Conference on Electronic Materials and Information Engineering (EMIE 2023), 129190A (2 November 2023); https://doi.org/10.1117/12.3010619

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KEYWORDS

Power consumption

Mathematical optimization

Clocks

Molybdenum

Quantum gates

Design and modelling

Transistors

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