GaAs 800-mb/s serial communications chip set

Kelvin G. Hickman

doi:10.1117/12.21015

1 October 1990 GaAs 800-mb/s serial communications chip set

Kelvin G. Hickman

Proceedings Volume 1291, Optical and Digital Gallium Arsenide Technologies for Signal Processing Applications; (1990) https://doi.org/10.1117/12.21015
Event: 1990 Technical Symposium on Optics, Electro-Optics, and Sensors, 1990, Orlando, FL, United States

Abstract

A high-speed communications chip set based on a 1500-gate structured cell gate array, designed specifically for interprocessor communications in multiprocessor environments has been developed. Needing a minimum of support logic, these three chips provide all link functions, including parallel/serial and serial/parallel conversion, data encoding/decoding, idle/quiet line detection, data clock phase recovery, and link error indicators. The link clock rate is 1 GHz, supporting a data rate of 800 megabit/second.

Citation Download Citation

Kelvin G. Hickman "GaAs 800-mb/s serial communications chip set", Proc. SPIE 1291, Optical and Digital Gallium Arsenide Technologies for Signal Processing Applications, (1 October 1990); https://doi.org/10.1117/12.21015

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available