Paper
23 May 2023 Design and implementation of a scalable self-adaptive reader-writer lock for multi-core systems
Bin Cai, Bingcheng Qiu, Jian Yao, Meiman Li, Gang Chen, Jing Wang, Ruilong Wu, Xu Zhang
Author Affiliations +
Proceedings Volume 12604, International Conference on Computer Graphics, Artificial Intelligence, and Data Processing (ICCAID 2022); 126044M (2023) https://doi.org/10.1117/12.2674755
Event: 2nd International Conference on Computer Graphics, Artificial Intelligence, and Data Processing (ICCAID 2022), 2022, Guangzhou, China
Abstract
With the rapid development of multi-core processor technology, parallelization has become the main approach for modern applications to improve throughput and responsiveness. However, the increasing number of processors also poses a challenge to the scalability of parallel program performance. In a traditional single-threaded program, all data is exclusively occupied by one thread, so the performance optimization of the program mainly focuses on the algorithm logic and implementation skills of the program; while in the multi-core system environment, most multi-threaded applications have performance scalability bottleneck. That is, the application cannot make full use of the performance advantages of multiple cores, and its performance decreases as the number of processors increases. The key factor restricting the improvement of performance scalability is often the synchronization mechanism of multi-core systems. Reader-writer lock is a synchronization mechanism that divides the operation to access shared resources or data into reader lock and writer lock, which enables effective cooperation between multiple different threads and ensures that applications can operate in a multicore environment with logical consistency. However, from another perspective, the reader-writer lock mechanism also limits the scalability of concurrent execution of applications. In application scenarios with different reader/writer ratios, the performance of reader-writer locks also differs, restricting the scalability of the performance of applications in multicore systems. Therefore, in a multi-core environment, it is of practical significance to implement a new type of readerwriter lock with scalable performance. This new reader-writer lock may automatically adjust the lock acquisition path according to the read/write ratio of the application scenario. In view of the shortcomings of the current reader-writer locks, this paper proposes a simple, efficient, optimized, and easy-to-implement adaptive reader-writer lock mechanism and interface which is suitable for multi-core environments, as well as application scenarios with different read/, write ratios. This mechanism gives full play to the high performance of multi-core systems and automatically adjusts lock acquisition according to different application scenarios. There are only minor changes to the application by replacing the original reader-writer lock instance and API interface function calls with an adaptive reader-writer lock instance and the API interface function calls for the adaptive reader-writer lock. The mechanism enables good scalability and improves the concurrency and scalability of reader-writer locks in multi-core systems in application scenarios with different read/write ratios. It will be conducive to meeting the growing demand for low latency, high throughput, and high concurrency processors.
© (2023) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Bin Cai, Bingcheng Qiu, Jian Yao, Meiman Li, Gang Chen, Jing Wang, Ruilong Wu, and Xu Zhang "Design and implementation of a scalable self-adaptive reader-writer lock for multi-core systems", Proc. SPIE 12604, International Conference on Computer Graphics, Artificial Intelligence, and Data Processing (ICCAID 2022), 126044M (23 May 2023); https://doi.org/10.1117/12.2674755
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Clocks

Data acquisition

Operating systems

Design and modelling

Computing systems

Data transmission

Artificial intelligence

Back to Top