In semiconductor chip manufacturing, dedicated metrology targets are used for measuring overlay (OVL) between layers after the lithographic process step. Until recently, overlay targets have had typical dimensions of 20x20 microns, but have been reduced in size to allow for more critical product real estate. Reducing metrology target size, however, increases optical crosstalk and diffractions from the target’s edges which can introduce significant errors in the reported OVL values. In this work, we will evaluate the following parameters: 1. The beam spot shape on the metrology target 2. The best target design under size/wavelength constraints 3. Improved OVL extraction algorithm We will present the hardware and software optimizations for experimental measurements taken over a cascade of targets. While decreasing the target’s size, we quantified the OVL measurement performance via dynamic precision, tool-induced shift (TIS), and results through focus (Z position). We will demonstrate how these optimizations enable the measurement of targets as small as 6x6 microns without compromising throughput or measurement quality.
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