Paper
19 October 2022 Research on anomaly data acquisition problem of a certain module
Chao Li, Jiyuan Zhang
Author Affiliations +
Proceedings Volume 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering; 1229444 (2022) https://doi.org/10.1117/12.2639989
Event: 7th International Symposium on Advances in Electrical, Electronics and Computer Engineering (ISAEECE 2022), 2022, Xishuangbanna, China
Abstract
A model of data acquisition module has an abnormal phenomenon of collecting data when collecting AD signals. To solve this problem, the design principle of the module is analyzed. A fault tree is built and the possible causes of the fault are analyzed one by one to finally locate the cause of the fault. The cause of the fault was located as a design flaw in the CPLD logic, which caused the accumulator to output an abnormal acquisition address, thus leading to data acquisition errors. The control logic of the CPLD was changed and a D flip-flop was added to the comparator output for filtering to prevent abnormal burrs from being transmitted to the reset-zero terminal of the accumulator. Full coverage test was conducted in the whole machine environment using the changed CPLD logic, and the module acquired data normally. The module can work normally and reliably.
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Chao Li and Jiyuan Zhang "Research on anomaly data acquisition problem of a certain module", Proc. SPIE 12294, 7th International Symposium on Advances in Electrical, Electronics, and Computer Engineering, 1229444 (19 October 2022); https://doi.org/10.1117/12.2639989
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KEYWORDS
Data acquisition

Logic

Data conversion

Failure analysis

Control systems

Data storage

Signal processing

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