2.1

European low flux CMOS image sensor

The low-flux CIS activity began in early 2016 led by Caeleste (Belgium). Caeleste is responsible for the design of the chip and LFoundry (Italy) for the manufacturing. The goal of the activity is to develop a radiation hard, charge domain global shutter, high dynamic range pixel for low flux / high flux space applications. The initial sensor design (see Figure 3) is back-thinned and has the following specification:

Figure 3

Left: Frontside chip of the European Low-Flux CIS packaged on chip-on-board. Right: detector architecture

In 2017, first images were acquired using the first front side illuminated samples. However, unexpected high pining voltages were measured on test structures. As a result, a second run of wafers with optimized implantations started and currently the backside thinning of those new wafers is taking place. First backside packaged samples are expected to be ready by end of 2018.

2.2

High-performance silicon visible hybrid CMOS image sensor

In addition to monolithic CMOS image sensors, the Agency seeks for developing a hybrid CMOS visible image sensor. Being hybrid, the manufactured detector is less sensitive to parasitic light and allows for separate optimization of the ROIC and the photodiode layer.

The goal of the activity is to demonstrate the potential of hybrid technology for high-performance silicon visible CMOS image sensors. The activity was granted to Teledyne-e2v (UK) and Leonardo (UK). The design of a dedicated ROIC was considered to be out of the scope of this activity. Efforts are instead focused on the photodiode design and the hybridization. The requirements are defined as follows:

The first run of manufacturing of the photodiode wafer, the post processing of ROIC wafer and the hybridization are completed (see Figure 4). The first packaged samples are under test and the first image was acquired. The second manufacturing run implementing small corrections on the design and process is currently taking place. The new batch of wafers are in progress and wafers are at the backthinning step. In October 2018 first packaged devices will be available.

Figure 4

Left: Hybrid CIS assembly. Right: Packaged hybrid CIS

2.3

Performance characterization and comparison of P-channel and N-channel CCD devices

This study explores the defects created in both N- and P-channel CCD204s when irradiated by protons, looking at defect type and mobility post-irradiation. Two irradiations were performed under cryogenic conditions (at 153K and 203K), with the devices held at mid-point temperature (173K) between irradiations. The performance characterization was held for three weeks at each temperature. The study was led by the Open University and the results are presented in [1].

The devices were tested pre- and post-proton irradiation for opto-electronic performance and showed comparable results. The study indicates that P-channel CCDs are superior in post-irradiation performance to N-channel CCDs for certain in-flight operating conditions and could increase operational mission lifetime due to their robustness against radiation damage (see Figure 5). Additionally, the activity brought new knowledge of trap species and densities in both N- and P-channel CCDs, which are an important asset for the design of future scientific instruments.

Figure 5

Left: Setup P- and N-channel CCDs with associated headboard electronics mounted to the copper cryogenic cold bench. Right: Factor difference in performance for both the P- and N-Channel after irradiation at 153K. Pre-irradiation CTI has been subtracted.

2.4

Curved detectors

Curved focal plane detectors offer a well-known method for simplifying the optical design without sacrificing performance for many applications. The reduction in mass and volume offered by the utilization of such detector arrays can clearly help in achieving these key objectives of space instrument design. The aim of this activity is to demonstrate that existing, high-performance 2D detector arrays (CCD or CIS), already used in space applications, can be successfully curved and still meet both performance and environmental requirements.

This activity encompasses the following tasks:

The contract is currently under negotiation, will start in Q3 2018 and is foreseen to be finished mid 2019.

2.5

The ALFA program

In 2010, the Agency initiated an ambitious, multi-activity program to develop a large-format (2k × 2k pixels) NIR detector array and associated control ASIC (application specific integrated circuit). The key aims of this program are to develop a photon to space wire system according to the roadmap shown in Figure 1.

The detector tested [2] at the end of phase two (see Figure 1) showed very promising results (see Figure 7). The best detector, the CEA/LETI (FR) LPE device (640*512 pixels, 15μm pitch), has been proton and then gamma irradiated. The results after the proton radiation are presented in [3] and show an increase of only 24% of the dark current after irradiation up to a fluence of 2.27e11p+ .cm^-2.

The program is at present in phase three led by Sofradir (FR) [4] and has the goal to design, manufacture and characterize a large format 2D array MCT array (shown in Figure 6) with the following parameters:

Figure 6

Format of ALFA-N large format MCT array.

Figure 7

Quantum efficiency measured on detectors as deliverable from the ALFA-N Phase 2 roadmap

The detailed design review has been completed successfully and the ROIC is under manufacture with the foundry. It is expected to be delivered in July this year with first ROIC level results available in the autumn.

Control ASIC developments

The Agency is supporting the development of versatile control ASICs to be able to control and read out a CMOS based detector.

In this context, two separate activities are on-going. The first one targets Earth Observation applications and the second one Science/Astronomy applications and in particular the ALFA-N detector as shown in Figure 1.

The Earth Observation targeted activity is run by Ideas (Norway) developing the NIRCA mkII. This ASIC shall be (see Figure 8) capable of providing clocks and bias voltages to operate the detector as well as providing video processing and digitisation (16 channels, 14 bit, up to 12 Msps), leading to a two-chip detection system (ASIC + detector). The NIRCA mkII is designed to be interface-compatible as a minimum with the Sofradir NGP detector and the Leonardo ME950. The critical design review is planned for November 2018.

Figure 8

Schematic layout of the control ASIC

The Science oriented activity aims to further develop a cryogenic, control and digitization application specific integrated circuit predominantly for optimized large area NIR/SWIR detector hybrids. After the phase 1 of the activity a prototype ASIC developed by Caeleste (BE) has been tested [5] using a dedicated test setup at ESTEC (see Figure 9).

Figure 9

Test set-up for prototype ASIC testing at ESTEC

For the second phase, after reissue, the activity is run by Caeleste with a kick-off in June 2018. It shall contain 36 video channels at a read-out speed of 100kHz at 16-bit/5MHz at 12-bit. It foresees a programmable seqencer for clocks and bias. The completion of the activity is scheduled for end of 2019.

2.6

Optimization of long, modular linear InGaAs imagers.

This activity aims to develop the next generation of long-linear InGaAs arrays with improved noise performance for commercial applications. This activity was granted to Xenics in Belgium.

The specifications are the following:

The heritage of this activity is the previous successful development for the Proba-V sensor with 3000 pixels, 25μm pitch and wire bonded. In the on-going activity, where the flip chip approach is replacing the wire bonding, currently a demonstrator with one 2k linear InGaAs chip wire bonded on a PCB is successfully fabricated. An appropriate custom ceramic package has been developed (see Figure 10). The noise optimization of the camera hardware/software and full characterization is on-going.

Figure 10

Left: Picture of one assembled FPA. Right: Custom ceramic package

2.7

Development of Low Dark Current MWIR/LWIR detectors

This development runs with two parallel contracts. The first one is led by AIM (DE) with Caeleste (BE) designing the ROIC and University of Cardiff (UK) for the characterization. The second one is led by Sofradir (FR) with CEA-LETI and CEA-SAP (FR) for design and characterization of the detectors.

The study is performance oriented and does not focus on any specific MCT technology or and specific ROIC architecture.

The key requirements for the activities are:

Sofradir have manufactured the detectors and started the characterizations of the chosen ROIC. In order to reach the 40K operating temperature, the setup has been updated and the characterization of the hybrid will start in the coming months.

In the AIM activity, also a design of a new ROIC with 4 read out segments (7T-CTIA, 5T-CTIA non-rad, 5T-CTIA rad-hard, SFD) has been developed. Characterization of the final demonstrators (n-on-p and p-on-n MCT materials) is on-going in Cardiff University. First results are very promising for the improvement of the dark current.

2.8

Low Dark current VLWIR T2SL Infrared detectors

The goal of the activity is to evaluate T2SL (type-II superlattice) detectors for space applications through the design, manufacture and test of high performance, low dark current VLWIR detector arrays using COTS ROIC and compare them with established technology.

The tested devices from IRNOVA (SE) have the following specifications:

The growth development, process development and detector fabrication/evaluation are in progress (see Figure 11).

Figure 11

Left: FLIR Indigo ISC0208 ROIC mounted on a LCC68 socket, before integration in ADS test set-up for electrical functional test. Right: Schematic depicting the band structure of the absorption region in a GaSb-InAs type II strained superlattice device.

The detailed design review took place in November 2017, but the best design option requires non-standard ROIC, therefore additional funding will be injected in the activity.

2.9

Evaluation of MCT APD Detectors for future space applications

Future astronomy missions require a low dark current, but in particular a very low noise contribution from the readout noise. In the standard photodiode architecture, the readout noise main contributor is coming from the first stage of the amplification. The technology offered by Avalanche Photodiode (APD) allows reducing the readout noise by creating an internal amplification where the photoelectrons are created under a high electric field. Current APD application are targeted to ground base astronomy [6], but this technology is also promising for future space missions.

The goal of the activity is to test and characterize existing European MCT APD arrays in a radiation environment.

The selected device is the ‘Saphira’ from Leonardo (UK) (see Figure 12) with the following performances:

A total of two irradiation campaigns have been performed:

Figure 12

SAPHIRA Avalanche Photodiode Array [datasheet from Leonardo]

Figure 13

Schematic detector layout of CHIME detector pre-development

Figure 14

Schematic detector layout of LSTM detector pre-development

The analysis of results is concluded and no degradation in performance has been observed for TID up to 28 krad (biased) and 56 krad (unbiased). Although some technical difficulties with the proton test occurred, no degradation was observed for irradiation up to 5.92E10 p/cm² at 62 MeV.

2.10

Copernicus pre-developments

In the frame of the “Copernicus Space Component Expansion” programme new missions have been identified by the European Commission (EC) as priorities for implementation in the coming years by providing additional capabilities in support of current emerging user needs. As part of the preparatory activities for the evolution of Copernicus, Phase A/B1 studies are being undertaken for 6 high priority candidate Expansion Sentinels, namely:

Each of the three optical candidate missions is accompanied by a dedicated detector pre-development programme. It is initiated in order to support the fulfillment of the mission goals, but also to build up future capabilities.