1.

INTRODUCTION

We teach an introductory course in silicon-photonics that covers basic properties of silicon waveguides; the essentials of silicon-on-insulator (SOI) waveguide fabrication (WGs); dispersion and propagation loss in Si WGs; analysis and design of various passive silicon devices such as strip and rib waveguides [1], directional couplers, Y-branch splitter/combiner, Mach-Zehnder interferometer (MZI); design and modeling of Bragg gratings and grating couplers for light input/output to/from devices and circuits; develop matrix method analysis in order to determine the transfer function of passive devices; modeling and characterization a Mach-Zehnder silicon modulator [2]; use free shareware KLayout to make device and integrated photonic circuit (PIC) layouts for E-beam lithography laboratory portion of the course.

This introductory course with laboratory in silicon-photonics is offered at senior and graduate level. Learning objectives for this laboratory includes basic skills for microfabrication techniques in the cleanroom such as oxidation, thin film metal deposition, photolithography, wet and dry etch; understanding design and process flow, fabricating and testing of silicon waveguides and Mach-Zehnder interferometers (MZI) on a silicon-on-insulator (SOI) wafer. This is a research based learning class for senior and graduate students on silicon-photonics (SiPh) design, fabrication, and testing where they are given both theoretical and laboratory projects to do.

2.

FABRICATION

The first part of lab is to fabricate an SOI wafer using dry oxidation followed by PECVD or sputtering processes in the cleanroom. Table 1 shows the process flow for fabrication of an SOI wafer (see Figure 1).

Table 1:

Process flow for fabricating an SOI based thermos-optic MZI.

The implemented process flow for a Si device fabrication includes PMMA resist spin coating, e-beam lithography, development, and Si etch with XeF₂ as follows in Table 2.

Table 2.

Process flow for E-beam lithography

Figure 1.

Silicon wafer after the oxidation (left) and the sputtering processes to produce amorphous silicon on oxide (right). Middle image is the plasma glow during sputtering.

Figure 2.

The KLayout design for straight and bend waveguides including ring resonators and grating couplers.

To produce silicon waveguides using the e-beam lithography with SEM the process defined in the NPGS software was followed. The waveguide pattern is a direct-write e-beam onto the photoresist. To determine the proper exposure time a varying dosage of 250, 500, 750, and 1000 μC/cm² were irradiated. When the photoresist received a low dosage of 250 μC/cm² the resulting patterns were faint after development as can be seen in Fig. 3.

Figure 3.

The low dose exposure by e-beam produces patterns.

However, when exposures at varying high measures of e-beam current were performed at values of 500, 750, and 1000 μC/cm² respectively. The resulting patterns written at these exposures from left to right 1000 μC/cm², 750 μC/cm², and 500 μC/cm² are shown in Fig. 4. Based on and their observation by microscope 20x the etched regions appear (a) to have exposed oxide layer, (b) to be partially through the device layer of the SOI, and (c) to have barely been etched past the resist layer.

Figure 4.

Waveguides produced at high dosages after silicon X-etch. The estimated dosage for (a) is 1000 μC/cm², (b) is 750 μC/cm², and (c) is 500 μC/cm².

3.

CHARACTERIZATION OF SILICON DEVICES

Some of the SiPh devices that had been designed and fabricated by students in order to determine quality of manufactured passive devices. A proper testing procedures was used for coupling light into photonic devices. An example of the intricate setup is shown in Figure 5. A set of 2 cameras are used to align the fiber array to the Si die input and output ports. The camera, pointed at an angle, was used to find and align the fiber array to the devices. The horizontal camera was used to bring the fiber array as close to the chip as possible to reduce beam divergence in the air between the array and the chip (see Fig. 6).

Figure 5.

The testing setup used to couple light into a SiPh device. A fiber array is oriented at 8° with respect to the normal to the surface of the Si die and the fibers are spaced in the array such that they align with the inputs and outputs of the Si devices.

Figure 6.

An image of a roughly aligned fiber array to a set of grating coupler input and output channels.

The setup used to test the photonic devices includes an SOA for amplifying a DFB laser signal, before inserting it into a photonic device. Then measuring the output using an optical spectrum analyzer.

To couple light into photonic devices, the standard spacing between optical inputs and outputs is supposed to match fiber array input and output optical fibers. One can see that the grating couplers are roughly spaced by the same distance as the fibers in the array in Figure 6. However, students managed to couple light into one of the fabricated Si devices. Yet, light coupling came with significant loss as shown in Figure 7(a).

Figure 7.

Optical spectrum analyzer output after measuring (a) the output of a ring resonator and (b) the output of the broadband laser source. The laser source is centered at approximately 1564 nm with a 20 dBm insertion loss. The resonance peak of the ring resonator is at about 1570 nm where the output signal was measured at approximately -80 dBm.

Unfortunately, it is very difficult to couple light into a device on the Si die via the fabricated grating couplers and the fiber array and the output signal power was exorbitantly low. This is likely due to the testing set up being difficult to align and that the actual efficiency of the coupler devices on the chip is unknown.