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Multiple patterning ArF immersion lithography has been expected as the promising technology to meet tighter process control requirements. The most important features for the next generation light sources are improvement of chip yield, enhancement of productivity and reduction of operational costs for chipmakers [1][2]. One of key performance for light source is E95 bandwidth, which has become more important parameter for enhancing process margin and improving device productivity. A faster actuator to move a lens improves E95 bandwidth stability [3]. This technology enables 3σ of E95 bandwidth field average to be under 10 fm. This contributes to more precise CD control and improves device yield. Latest LNM enables E95 bandwidth to lower from the standard 300 fm to 200 fm [4]. The large shrinkage for E95 bandwidth is achieved by introducing the ingenious design in LNM. High purity E95 bandwidth improves imaging contrast and therefore increases exposure latitude. A new control algorithm enables E95 bandwidth to vary up to 450 fm, leveraging the movable lens. The combination of the new LNM, the movable lens and the new bandwidth control algorithm enables E95 bandwidth to control between 200 fm and 450 fm [5]. The tunable E95 bandwidth technology can improve process productivity for chip makers by compensating not only machine to machine difference of imaging contrast but also difference of imaging contrast between different generation scanners. The tunable E95 bandwidth technology has no influence on key laser performance indicator, dose stability, wavelength stability, E95 bandwidth stability, etc. On the other hand, to reduce downtime and operational costs for chipmakers, the lifetime of consumable modules such as a chamber and a line narrowing module (LNM) is needed to be extended. New electrodes with chamber enables chamber lifetime to extend from 60 billion pulses (Bpls) to 70 Bpls. Furthermore, new optical design in LNM enables the lifetime to extend from 60 Bpls to 110 Bpls. A new ArF excimer laser, GT65A, maximizes device yield, process productivity and minimizes the operational costs for chipmakers.
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