Towards co-packaging of photonics and microelectronics in existing manufacturing facilities

Alexander Janta-Polczynski; Elaine Cyr; Jerome Bougie; Alain Drouin; Richard Langlois; Darrell Childers; Shotaro Takenobu; Yoichi Taira; Ted W. Lichoulas; Swetha Kamlapurkar; Sebastian Engelmann; Paul Fortier; Nicolas Boyer; Tymon Barwicz

doi:10.1117/12.2291902

22 February 2018 Towards co-packaging of photonics and microelectronics in existing manufacturing facilities

Alexander Janta-Polczynski, Elaine Cyr, Jerome Bougie, Alain Drouin, Richard Langlois, Darrell Childers, Shotaro Takenobu, Yoichi Taira, Ted W. Lichoulas, Swetha Kamlapurkar, Sebastian Engelmann, Paul Fortier, Nicolas Boyer, Tymon Barwicz

Author Affiliations +

Proceedings Volume 10538, Optical Interconnects XVIII; 105380B (2018) https://doi.org/10.1117/12.2291902
Event: SPIE OPTO, 2018, San Francisco, California, United States

Abstract

The impact of integrated photonics on optical interconnects is currently muted by challenges in photonic packaging and in the dense integration of photonic modules with microelectronic components on printed circuit boards. Single mode optics requires tight alignment tolerance for optical coupling and maintaining this alignment in a cost-efficient package can be challenging during thermal excursions arising from downstream microelectronic assembly processes. In addition, the form factor of typical fiber connectors is incompatible with the dense module integration expected on printed circuit boards. We have implemented novel approaches to interfacing photonic chips to standard optical fibers. These leverage standard high throughput microelectronic assembly tooling and self-alignment techniques resulting in photonic packaging that is scalable in manufacturing volume and in the number of optical IOs per chip. In addition, using dense optical fiber connectors with space-efficient latching of fiber patch cables results in compact module size and efficient board integration, bringing the optics closer to the logic chip to alleviate bandwidth bottlenecks. This packaging direction is also well suited for embedding optics in multi-chip modules, including both photonic and microelectronic chips. We discuss the challenges and rewards in this type of configuration such as thermal management and signal integrity.

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Alexander Janta-Polczynski, Elaine Cyr, Jerome Bougie, Alain Drouin, Richard Langlois, Darrell Childers, Shotaro Takenobu, Yoichi Taira, Ted W. Lichoulas, Swetha Kamlapurkar, Sebastian Engelmann, Paul Fortier, Nicolas Boyer, and Tymon Barwicz "Towards co-packaging of photonics and microelectronics in existing manufacturing facilities", Proc. SPIE 10538, Optical Interconnects XVIII, 105380B (22 February 2018); https://doi.org/10.1117/12.2291902

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