Paper
7 November 1983 Image Matching: A Method For Overlay Error Reduction
Ronald E. Chappelow
Author Affiliations +
Abstract
Many techniques aimed at reducing the magnitude of overlay error are practiced within the semiconductor industry. For example, attempts are made to manufacture masks as similar to each other as possible, and exposure tools used for successive product levels are selected to be as well-matched as possible. Although these and similar techniques have contributed to some reduction in overlay error, the degree of improvement has not been remarkable for several reasons. For example, there exist some contributing factors which are not easily brought under control, such as wafer-specific effects. Also, different masks interact with different exposure tools through a variety of mechanisms which produce a remarkable diversity of performance results.
© (1983) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Ronald E. Chappelow "Image Matching: A Method For Overlay Error Reduction", Proc. SPIE 0394, Optical Microlithography II: Technology for the 1980s, (7 November 1983); https://doi.org/10.1117/12.935124
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Photomasks

Semiconducting wafers

Overlay metrology

Error analysis

Information operations

Image processing

Manufacturing

Back to Top