|
Two TIXM12 germanium junction field effect transistors (JFETs) were briefly characterized at 77, 4, and 1.8K. Both FETs could be operated independently as grounded gate source followers, or connected together in a dual-FET dc-coupled Transimpedance mode Am-plifier (TIA). In the source follower mode a cooled, 1.2E10-ohm load resistor was connected between the gate and ground for one JFET, while the other had its gate grounded directly. In the TIA mode the same load resistor was used as the feedback resistor. Source follower gain, input capacitance, characteristic I-V curves, input leakage current, and transconductance were measured over a small range of conditions. Noise spectral density curves for each device, when operated in the independent source follower mode and when combined as the dual-FET TIA, were measured from dc to 50KHz over a small range of parameters. For experimental devices that were made at least 10 years ago by dated techniques and crudely packaged, these Ge JFET's worked surprisingly well. At 4K and 1.8K, with proper biasing and a few hundred microwatts of power dissipation, the source follower gain is greater than 0.9; the input capacitance is close to 4 pF; the transconductance is about 3.000 micromhos: the I-V curves are quite orderly: the spot noise is about 80 nanovolts per root hertz at 1 Hz: the input leakage current can be forced to zero: and the TIA yields the Johnson noise of the 1.2E10-ohm feedback resistor. There is, however, a noise term at 4K and 1.8K that is sensitive to the gate bias. We believe this bias-sensitive noise source is process dependent and may be removed by modern manufacturing methods. We believe the test results imply, in principle, that an integrated-array focal plane using germanium detectors, germanium resistors, and germanium JFET preamplifiers in the same monolithic structure is feasible. Another implied use could be in an all germanium Charge Coupled Device [CCD] utilizing bump bonding to the germanium JFET's. The devices also have immediate application in discrete detector arrays where system constraints preclude the use of a thermally isolated and bulky silicon JFET housing.
|
